The cohort the headline fabs hid
Almost every line written about insuring India's chip ambition has chased the megaprojects: the Tata-PSMC fab in Dholera, Micron's ATMP at Sanand, the CG Power and Kaynes packaging plants. Those are property and engineering stories, billions of rupees of clean-room kit insured under erection-all-risks during build and material damage plus business interruption once running.
That framing misses a different and faster-growing cohort entirely. The India Semiconductor Mission has approved a clutch of fab and packaging facilities across several states, but the more interesting set of companies sits inside the Design Linked Incentive (DLI) scheme. The DLI now backs a couple of dozen fabless design startups, a good share of which have raised venture capital, and the government has signalled a target of enabling at least 50 such companies as the scheme moves into its next phase. Between them these startups have run multiple tape-outs, with some chips already fabricated at advanced nodes, spanning RISC-V processors, automotive and defence ASICs, networking SoCs and edge-AI accelerators.
A fabless startup owns no fab. It designs the chip, licenses or builds the IP blocks, runs verification, then sends a GDSII file to a foundry (TSMC, GlobalFoundries, SCL Mohali or a packaging partner) which manufactures it. The startup has barely any physical plant to insure. What it has instead is a balance sheet of intangibles and a liability profile that lives downstream, baked into automotive controllers, defence surveillance systems and consumer devices it will never physically touch.
Why fab policies do nothing for the designer
Brokers placing semiconductor risk in India have mostly seen the foundry side, and the policy architecture there is well understood. A fab buys erection-all-risks during construction, then material damage on the building and tools, machinery breakdown on the lithography and deposition equipment, marine cargo on imported wafers and reticles, and business interruption (often with a long indemnity period) because a contamination event or power excursion can idle a line for months. Add boiler and pressure plant cover for the gas and chemical infrastructure.
None of that responds to a design startup's actual loss. The fabless company's clean room is a server farm running EDA tools; its inventory is a netlist. If a logic bug in its automotive ASIC causes an airbag controller to misfire across a production run, the foundry's BI policy is irrelevant, the OEM's recall is not the fab's loss, and the startup's own property cover (a modest office and IT policy) sees nothing. The exposure is third-party: bodily injury, property damage and pure financial loss flowing from a defect that originated in the design, not the silicon.
This is the structural point brokers must internalise. In a vertically integrated chipmaker, design defect and manufacturing defect sit under one roof and one insurance programme. In the fabless model the two are legally and contractually split. The foundry's contract almost always caps its liability at the wafer price and disclaims consequential loss, so when a field failure occurs, the foundry points back up the chain to the design house. The startup is left holding a defect-by-design claim with a foundry indemnity that is, in practice, worth a few lakh rupees of re-fabrication and nothing more.
The correct programme is therefore built around third-party liability, not property. The spine is product liability, supported by professional indemnity (technology errors and omissions), product recall, and IP infringement defence. Property and engineering cover the office and servers, but they are footnotes.
Product liability by design: where the trigger actually sits
Product liability is the load-bearing wall, but the standard Indian market wording was written for manufacturers who make a physical thing. A fabless startup needs the policy read and endorsed carefully so it responds to a defect in a design embodied in someone else's product.
Three wording issues decide whether a claim is paid:
- Definition of the insured's product. The schedule must describe the product as the integrated circuit or IP core as designed and supplied by the insured, including the design, firmware, register-transfer-level description and associated documentation, however embodied or fabricated. If it just says manufactured by the insured, an insurer can argue the startup manufactured nothing and decline.
- Defect definition. It must capture design defect and not only manufacturing or material defect. For a fabless company a manufacturing-only defect trigger is almost worthless, because manufacturing belongs to the foundry.
- Damages reach. Indian product liability historically attaches to third-party bodily injury and property damage. A chip failure often causes pure economic loss to the OEM customer (a line stoppage, a scrapped batch of boards) with no injury. Standard wordings exclude pure financial loss, so the design house also needs technology errors and omissions sitting alongside to catch that gap.
India does not yet have a dedicated product liability statute for components the way some jurisdictions do, but the Consumer Protection Act 2019 introduced a statutory product liability action against product manufacturers, sellers and service providers. A chip-design firm can be drawn in as a manufacturer of the design embodied in a defective end product, which is exactly why the policy definitions above must be tightened.
Limits should be benchmarked to the end-application, not the chip price. An ASIC selling for Rs 200 can sit in a Rs 15 lakh car or a defence platform worth crores. Underwriters will want the bill of materials exposure, the named end-markets (automotive and medical drive the highest rates), and whether the chip touches a safety function (ASIL-rated automotive parts under ISO 26262) before they quote.
The IP infringement exposure cuts both ways
For a design startup, intellectual property is simultaneously the only real asset and the largest uninsured liability. Industry surveys have long shown the fabless community is acutely worried about IP, and the concern is rational: a chip is thousands of cells, reused IP blocks, licensed cores and EDA-generated structures, any of which can read on someone else's patent.
There are two distinct exposures and brokers conflate them at their peril.
First, the startup as alleged infringer. A US or European patent holder (or a non-practising entity) sues, alleging the startup's RISC-V core or memory controller infringes a granted claim. Defence costs alone run into crores before any finding, and an injunction can stop the product shipping. This is the exposure that patent-infringement defence insurance and the IP-rights cover within a technology liability programme are designed to absorb. It is a specialist line, written by a thin set of insurers and reinsurers, with careful underwriting of the patent portfolio and freedom-to-operate analysis.
Second, the startup as victim. The fabless model hands a complete GDSII to a foundry, which creates real risk of overproduction, cloning and reverse engineering. Insurance does little for the loss of trade-secret value itself; that is a contracts, NDA and IP-management problem. But the downstream consequences (a counterfeit chip causing a field failure, then a claim back to the genuine designer) circle back into the product liability discussion above.
A practical placement note: many off-the-shelf product liability and general liability wordings carry a broad IP infringement exclusion. If that exclusion is left in and no affirmative IP cover is bought, the startup has a visible, unfunded hole exactly where its founders feel most exposed. The broker's job is to either carve the exclusion back or place a dedicated intellectual property infringement policy so the two programmes interlock rather than overlap or gap.
Recall: the catastrophe scenario for an asset-light company
Recall is where a fabless startup can be wiped out, and it is the cover founders understand least. A single defective design does not fail one unit, it fails every unit fabricated to that mask set. If the chip has shipped into 50,000 vehicles or a million handsets, the recall logistics are owned by the OEM, but the OEM will look to recover from the component supplier, and the design house is the supplier of record for the defect.
Product liability typically pays for third-party injury and damage but excludes the cost of recalling and replacing the insured's own product. That gap is filled by product recall insurance, which responds to the first-party costs of a recall (notification, retrieval, transport, destruction, replacement) and, in better wordings, third-party recall liability where the customer's recall expense is contractually passed back.
The practical issue for a startup is quantum versus premium. A genuine automotive recall can cost tens of crores, far beyond what a Series A company can afford in premium for a full limit. The placement answer is layered and triggered carefully:
- Buy recall as a sub-limit or separate section keyed to the named high-consequence end-markets only (automotive, medical), not every customer.
- Push the trigger to a defined event of a serious safety defect, not a commercial reject, to keep the premium proportionate.
- Use the contract with the foundry and the customer to allocate who bears recall, then insure the residual the startup actually carries, rather than insuring a theoretical worst case it has contracted away.
This is the same discipline Indian exporters apply on global recall placements: map the contractual recall obligation first, then insure the net retained exposure. A design startup that insures blind, without reading its customer purchase orders, either overpays or buys a limit that does not match where the liability actually lands.
Building the programme: a placement stack that fits a DLI startup
A fabless design startup at Series A or DLI-grant stage cannot carry a full vertically-integrated chipmaker's programme, and does not need to. The art is sequencing cover to the funding stage and the named end-markets. A workable stack, in priority order:
- Technology errors and omissions plus product liability, combined. This is non-negotiable from first commercial tape-out. The E&O catches pure financial loss and the failure-to-perform claims; the product liability catches injury and property damage from a defective design. Insist on a design-defect trigger and the product definition language above.
- IP infringement defence. Either as an extension to the technology liability programme or a standalone patent defence policy, scaled to the markets the chip ships into. A startup selling only into India faces a different patent risk than one shipping a RISC-V core to the US.
- Directors and officers liability. Once venture capital is in, investors will require D&O. A defect or IP claim that hits the company will also draw the founders personally, and DLI-stage boards now expect this as table stakes.
- Product recall, sub-limited to the high-consequence end-markets, as set out above.
- Cyber. Design IP is the crown jewel and lives on servers and in the EDA cloud. A breach is both a trade-secret loss and a potential supply-chain compromise. Pair this with the IP programme.
- Property and engineering for the office, servers and any lab or test equipment. Real but small.
Underwriters will price off the end-market mix, the design verification and functional-safety process maturity (ISO 26262 and DO-254 evidence helps), the customer contract liability caps, and the patent freedom-to-operate position. A startup that can show clean verification sign-off and capped customer contracts will see materially better terms than one that cannot.
The Indian market reality and what brokers should do now
The honest position in mid-2026 is that no Indian insurer has an off-the-shelf fabless programme. Product liability and product recall are available domestically; technology E&O and standalone patent-defence cover are thin, often fronted locally and reinsured into specialist London and Singapore markets. For a startup shipping into the US, the patent and product liability exposure is genuinely international, so the programme will usually need an international insurer's wording and claims capability even if the policy is issued in India.
This is a placement gap and an opportunity. The DLI cohort is small, fundable and growing toward the stated 50-company target. A broker who builds a repeatable design-house programme now (with the product definition, design-defect trigger and IP carve-backs already negotiated) will own the panel as the cohort scales. The wrong move is to hand these founders a manufacturer's product liability template and call it done.
Three things a broker should do this quarter:
- Read the customer contracts, not just the proposal form. The liability caps, recall pass-back clauses and indemnities in the OEM purchase orders define the real net exposure. Insure that, not a generic worst case.
- Map the foundry indemnity. Confirm in writing that the foundry's liability stops at wafer cost so there is no false comfort that the manufacturing partner absorbs design-defect claims. It does not.
- Stage the limits to funding and shipment. A pre-revenue design startup and a startup shipping ASICs into automotive are different risks. Align cover to the milestone, and revisit at every tape-out and every new named end-market.
The fabless founder's exposure is product-liability-by-design plus third-party IP plus field recall, sitting on a company with almost no hard assets. That is precisely the profile insurance exists to transfer. The broker who frames it that way, rather than reaching for a fab or a manufacturer template, is the one these startups will keep.