Semiconductor Fabrication Insurance: Emerging Risks for India's Chip Manufacturing Push

India's semiconductor manufacturing push is arguably the most capital-intensive industrial policy initiative since the country's nuclear programme. The India Semiconductor Mission (ISM), launched under the Ministry of Electronics and Information Technology with an outlay of INR 76,000 crore, aims to establish multiple fabrication plants (fabs), outsourced semiconductor assembly and test (OSAT) facilities, and compound semiconductor manufacturing units on Indian soil. Tata Electronics, CG Power (in partnership with Renesas), and the Vedanta-Foxconn joint venture (now restructured) represent the early movers. Gujarat's Dholera Special Investment Region, Assam, and Karnataka are competing to host these facilities.

Yet amid the policy announcements, land acquisitions, and MoU signings, almost no public discussion has addressed the insurance dimension of semiconductor fabrication. This silence is not accidental. India's commercial insurance market has no domestic loss history for semiconductor fabs. No Indian insurer has ever underwritten a 300mm wafer fabrication facility. The SFSP (Standard Fire and Special Perils) policy, the backbone of Indian commercial property insurance, was designed for warehouses, factories, and office buildings, not for facilities where a single lithography tool costs USD 150 million and a 30-second power fluctuation can destroy an entire production batch worth several crore.

The insurance vacuum creates a circular problem. Indian insurers lack the underwriting expertise to price semiconductor fab risk accurately. Global reinsurers, who do possess that expertise (Munich Re, Swiss Re, and FM Global have decades of fab loss data from Taiwan, South Korea, and the US), will demand terms that reflect the true volatility of the risk. The gap between what Indian insurers are comfortable offering and what semiconductor manufacturers need is wide, and closing it will require a deliberate effort by IRDAI, the domestic insurance industry, and the semiconductor companies themselves.

The defining feature of semiconductor fabrication from an insurance perspective is the cleanroom environment. A modern fab operates at ISO Class 1 to Class 5 cleanliness, meaning a cubic metre of air contains no more than 10 to 100,000 particles of 0.1 micron size. For context, ambient outdoor air in a relatively clean Indian city might contain several billion particles per cubic metre. Maintaining this environment requires continuous HEPA and ULPA filtration, positive-pressure air handling, temperature control within plus or minus 0.1 degrees Celsius, and humidity regulation within plus or minus 0.5% relative humidity.

This extreme environmental sensitivity transforms risks that would be trivial in a conventional factory into catastrophic events in a fab. A minor roof leak that would cause INR 50,000 of damage in a garment factory can contaminate an entire cleanroom and halt production for weeks, generating losses of INR 50 crore or more. A brief vibration event from nearby construction, a passing heavy vehicle, or even a minor seismic tremor can misalign lithography tools operating at nanometre precision. Airborne molecular contamination (AMC) from outgassing construction materials, volatile organic compounds from nearby industrial activity, or even perfume worn by a maintenance worker can deposit on wafer surfaces and render an entire lot defective.

Indian insurers accustomed to surveying factories and warehouses will need to develop entirely new risk assessment methodologies for cleanroom facilities. The standard fire surveyor's checklist, which focuses on building construction class, fire protection systems, electrical wiring condition, and housekeeping, is wholly inadequate for evaluating fab risk. Surveyors will need to assess HVAC system redundancy, particulate monitoring protocols, vibration isolation standards, chemical delivery system integrity, and emergency power transfer reliability, none of which feature in current IRDAI survey guidelines.

A modern semiconductor fab represents one of the most extreme asset concentrations in any industry. The construction cost for a single 300mm fab ranges from USD 10 billion to USD 20 billion (approximately INR 85,000 crore to INR 1,70,000 crore at current exchange rates). Of this, roughly 70-75% is equipment cost, with the balance split between building construction, cleanroom fit-out, utilities infrastructure, and process piping. The most expensive single piece of equipment in any fab is the extreme ultraviolet (EUV) lithography system manufactured by ASML, which costs approximately USD 150-200 million per unit, and a leading-edge fab may require 10-20 of these systems.

This asset concentration creates several problems for Indian insurers. First, the sum insured for even a single fab exceeds the net retention capacity of most Indian insurance companies. The largest Indian non-life insurers, New India Assurance, United India Insurance, Oriental Insurance, and National Insurance, have combined net worth that would be strained by a total loss at a single advanced fab. The risk must be layered across domestic co-insurers and international reinsurers, with the Indian lead insurer retaining only a small percentage.

Second, the replacement timeline for destroyed fab equipment is measured in years, not months. ASML has a multi-year backlog for EUV systems. Replacement of a destroyed advanced lithography tool could take 24-36 months from order to installation, during which the fab cannot produce at full capacity. This extended replacement period has direct implications for business interruption insurance, where the standard 12-month indemnity period available in Indian policies is entirely inadequate. Fabs will require BI indemnity periods of 36 to 48 months at a minimum.

Third, the interdependency of fab equipment means that damage to one critical system can idle the entire facility. Unlike a conventional factory where production lines can operate independently, a semiconductor fab is a sequential process where wafers move through hundreds of process steps in a fixed sequence. Destruction of a single tool at a bottleneck step can halt all output, creating business interruption losses vastly disproportionate to the material damage.

Semiconductor fabrication has utility infrastructure requirements that are orders of magnitude more demanding than conventional manufacturing. A typical 300mm fab consumes 100-150 megawatts of continuous electrical power, equivalent to a small city. More critically, the quality of that power, its voltage stability, frequency consistency, and freedom from transients, must meet specifications far tighter than what Indian grid power delivers. A voltage sag lasting 200 milliseconds, which would not even flicker the lights in an office, can crash a fab's process tools, corrupt in-process wafers, and trigger a cascade of equipment shutdowns that takes days to recover from.

Indian fabs will operate in a power environment that is fundamentally less stable than Taiwan, South Korea, or the US. Despite significant improvements in India's grid reliability, the country still experiences voltage fluctuations, frequency deviations, and unplanned outages at rates that would be unacceptable for fab operations. Fabs will require dedicated power infrastructure: dual-feed high-tension supply, on-site substations with automated fast-transfer switches, uninterruptible power supply (UPS) systems for critical tools, and on-site generation capacity (typically gas turbine or diesel generators) sufficient to support full fab operations during grid outages.

The insurance implications are significant. Power quality events that cause no visible physical damage but destroy in-process wafers and contaminate cleanrooms create loss scenarios that fall into a grey zone between property damage and consequential loss. Indian policy wordings that require physical damage to trigger coverage may not respond to a loss caused by a 200-millisecond voltage dip. Insurers will need to consider specific power quality endorsements or electronic equipment policies (aligned with the IRDAI-approved Electronic Equipment Insurance policy wording) that define covered perils to include power supply irregularities.

Water purity presents a parallel challenge. A fab uses 30,000 to 50,000 cubic metres of ultrapure water (UPW) daily, with purity specifications requiring resistivity above 18.2 megaohm-centimetres and total organic carbon below 1 part per billion. The UPW plant is as critical to fab operations as the process tools themselves. Contamination of the UPW supply, whether from a failure in the purification system, backflow from industrial water lines, or ingress of biological contaminants, can corrupt wafer processing and shut down the fab. Insurance coverage for UPW system failures and consequent production losses requires careful structuring, as these events may not fit neatly within standard machinery breakdown or property damage policy frameworks.

Semiconductor fabrication uses hundreds of chemicals, many of which are acutely toxic, pyrophoric, corrosive, or environmentally hazardous. Silane (SiH4) is spontaneously flammable in air. Arsine (AsH3) and phosphine (PH3) are lethal at concentrations measured in parts per million. Hydrofluoric acid (HF) can cause fatal systemic toxicity through skin contact. Chlorine trifluoride (ClF3), used in chamber cleaning, is so reactive that it can ignite glass and concrete on contact.

The chemical inventory of a single fab represents a concentrated hazmat risk that exceeds what most Indian industrial facilities present. Indian environmental and safety regulations, specifically the Manufacture, Storage and Import of Hazardous Chemical Rules (MSIHC, 1989, as amended), the Chemical Accidents (Emergency Planning, Preparedness and Response) Rules, 1996, and the Environment Protection Act, 1986, impose obligations on facilities handling these materials. Fabs will require environmental clearances from the State Pollution Control Board, preparation of on-site and off-site emergency plans, and regular safety audits.

From an insurance perspective, the chemical hazard profile creates exposure across multiple policy lines. Public liability insurance under the Public Liability Insurance Act, 1991 is mandatory for facilities handling hazardous substances and provides a first layer of compensation for third-party chemical accident victims. Beyond this statutory minimum, fabs will need substantial environmental impairment liability (EIL) coverage to address pollution incidents, contaminated land cleanup obligations, and third-party bodily injury claims arising from chemical releases.

The cost of environmental remediation after a chemical spill at a fab can be enormous. Contamination of groundwater by fluorinated compounds or heavy metals can trigger cleanup obligations that persist for decades. Indian courts have increasingly applied the 'polluter pays' principle, and the National Green Tribunal (NGT) has ordered remediation costs that run into hundreds of crore for major contamination events. Standard commercial general liability (CGL) policies sold in India typically contain pollution exclusions, meaning fabs need dedicated EIL policies, a product line that is underdeveloped in the Indian market and may need to be sourced through international insurers or specialist Lloyd's syndicates.

The semiconductor supply chain is one of the most concentrated and fragile in global manufacturing. ASML is the sole supplier of EUV lithography systems. A handful of Japanese companies (TEL, Screen Holdings, Kokusai Electric) and American firms (Applied Materials, Lam Research, KLA) supply the vast majority of other process tools. Specialty chemicals and gases come from a similarly narrow supplier base. High-purity silicon wafers are produced by just five companies globally (Shin-Etsu, SUMCO, Siltronic, SK Siltron, and GlobalWafers).

For Indian fabs, this supply chain concentration creates contingent business interruption (CBI) exposure of a magnitude rarely seen in other Indian industries. A fire at a single chemical plant in Japan can halt precursor gas supply and shut down Indian fab operations within weeks. An earthquake in Taiwan can disrupt spare parts availability for process tools. A trade restriction or export control imposed by a foreign government can cut off access to critical equipment or materials overnight.

Standard CBI coverage available in the Indian market is poorly suited to semiconductor supply chain risk. Most Indian CBI endorsements require physical damage at the supplier's premises to trigger coverage. Supply disruptions caused by export controls, trade sanctions, logistics bottlenecks, or force majeure events that do not involve physical damage at the supplier's facility fall outside the coverage trigger. In addition, Indian CBI endorsements typically require the policyholder to identify named suppliers in the policy schedule, which becomes impractical when a fab relies on hundreds of tier-one suppliers and thousands of tier-two and tier-three suppliers.

Insurers and brokers serving the semiconductor sector will need to develop extended supply chain coverage that goes beyond traditional CBI. This might include non-damage business interruption (NDBI) extensions, trade disruption covers, and supply chain mapping services that identify concentration risks and single points of failure. The premium for such coverage will be substantial, reflecting the genuine vulnerability of the semiconductor supply chain, but the alternative is a fab operator bearing uninsured supply chain losses that can easily exceed the material damage from a physical loss event.

India's fabs will not initially manufacture leading-edge chips (sub-5nm nodes). The announced projects target mature nodes (28nm to 65nm) and specialty applications (power semiconductors, analog chips, display drivers, and automotive-grade components). Nevertheless, even at these technology nodes, the intellectual property (IP) and product liability exposures are significant.

Fabs operate under licensing agreements from IP holders for process recipes, cell libraries, and design rules. A breach of these licensing terms, whether through inadvertent technology leakage, employee defection to a competitor, or a cyber intrusion that exfiltrates process data, can trigger IP infringement claims running into hundreds of millions of dollars. Indian fabs will need technology errors and omissions (Tech E&O) coverage and IP defence cost insurance, products that are available through global specialty markets but have almost no precedent in Indian domestic insurance.

Product liability exposure is equally concerning. A defective semiconductor chip that passes quality inspection but fails in the field can cause cascading damage in the end product. A faulty automotive-grade chip that causes a braking system malfunction, a defective power management IC that causes a battery fire, or a flawed medical device chip that delivers incorrect readings can all result in product liability claims that trace back to the fab. Product recall insurance and product liability coverage with semiconductor-specific terms (covering both the chip value and the consequential damage to the end product) will be essential.

Cyber risk adds another dimension. Fabs are high-value targets for state-sponsored industrial espionage, ransomware groups, and hacktivists. The TSMC WannaCry incident of 2018, which shut down multiple fabs for three days and cost an estimated USD 170 million, demonstrated that cyber events can cause physical production losses at semiconductor facilities. Indian fabs, which will likely use a mix of legacy and current-generation operational technology (OT) systems, face cyber risks that straddle the boundary between IT and OT security. Standard cyber insurance policies that focus on data breach and privacy liability may not adequately cover the production loss component of a fab cyber incident. Policies will need to be structured to cover both the IT exposure (data breach, privacy, regulatory fines under DPDPA 2023) and the OT exposure (production downtime, equipment damage from manipulated process parameters, and cleanroom contamination from disabled environmental controls).

The arrival of semiconductor fabrication in India represents both a challenge and an opportunity for the Indian insurance industry. The challenge is that the existing product framework, underwriting expertise, and claims handling capability are insufficient for this sector. The opportunity is that a single fab generates annual insurance premium of INR 200-500 crore across property, BI, liability, marine cargo, and specialty lines, making the semiconductor sector one of the most premium-dense industrial segments an insurer can serve.

IRDAI should consider several regulatory actions. First, the regulator should issue guidance on semiconductor fab risk assessment, either as an annexure to the existing fire insurance guidelines or as a standalone circular. This guidance should address sum insured adequacy for high-value process equipment, minimum BI indemnity periods for semiconductor facilities, cleanroom contamination as an insured peril, and loss assessment methodology for in-process wafer damage. Second, IRDAI should facilitate knowledge transfer by encouraging Indian insurers to enter technical collaboration agreements with global reinsurers and loss prevention organizations (FM Global, Zurich Engineering, and Munich Re's HSB subsidiary) that have established semiconductor underwriting practices.

Indian insurers must invest in building semiconductor-specific underwriting teams. This means hiring or training engineers with semiconductor process knowledge, establishing relationships with fab equipment OEMs for replacement cost and timeline data, and developing survey protocols that address cleanroom integrity, vibration isolation, power quality infrastructure, chemical handling systems, and UPW plant reliability. The surveyor who inspects a fab must understand what a CVD (chemical vapour deposition) chamber does and why its failure mode differs from a CNC milling machine.

For brokers and risk advisors, the semiconductor sector demands a consultative approach that begins at the project design stage. Insurance considerations should influence fab site selection (seismic zone, flood zone, proximity to chemical transport corridors), utility infrastructure design (redundancy levels, backup power capacity), and supply chain strategy (dual-sourcing critical materials, maintaining safety stock of long-lead-time spares). Retroactively insuring a completed fab with inadequate infrastructure is far more expensive and less effective than designing insurability into the project from inception.